5 Mega Pixel Digital Camera Package


The 5 Mega Pixel Digital Camera Development Package provides everything you need to develop a 5 Mega Pixel Digital Camera on the Terasic FPGA system board. The kit contains hardware design (in Verilog) and software to load the picture taken into the PC and save it as BMP/JPG file. The Getting Started User Guide shows users how to exercise the digital camera functions.

  • Complete reference design with source code in Verilog
  • A User Manual with Live Demo examples
  • Support exposure time controlling - users can adjust the exposure according to the light of the surrounding area
  • Support motion capture mode
  • Software allows users to upload the picture captured into PC and save the picture into bitmap format or Joint Photographic Experts Group for viewing.
  • Equipped with Micron 5 Mega Pixel CMOS sensor

    Support 2,592H x 1,944V active pixels

    Output data in RGB Bayer Pattern format

  • Full resolution frame rate up to 15 frame per second(FPS)
  • Provide users entire reference design (Frame Grabber, high-performance multi-port SDRAM frame buffer, image processing IPs)
  • Support Altera DE3/ DE2_70/ DE2/ DE1/DE0 and Cyclone II Starter boards

The package of D5M module includes

  • One D5M module
  • One System CD
  • 40-pin ribbon connector cable


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